A CMOS Voltage Reference with Output Voltage Doubling Using Modified 2T Topology

Junyao LiPak Kwong Chan2024-03-282024-03-282022jz000027-0007https://tustorage.ulb.tu-darmstadt.de/handle/tustorage/1576621.3A CMOS Voltage Reference with Output Voltage Doubling Using Modified 2T Topologyhttps://doi.org/10.3390/chips1030015