Synergistic Verification of Hardware Peripherals through Virtual Prototype Aided Cross-Level Methodology Leveraging Coverage-Guided Fuzzing and Co-Simulation

dc.contributor.authorSallar Ahmadi-Pour
dc.contributor.authorMathis Logemann
dc.contributor.authorVladimir Herdt
dc.contributor.authorRolf Drechsler
dc.date.accessioned2024-03-28T11:01:00Z
dc.date.available2024-03-28T11:01:00Z
dc.identifier.urihttps://tustorage.ulb.tu-darmstadt.de/handle/tustorage/1621
dc.rights.urihttps://creativecommons.org/licenses/by/4.0/
dc.titleSynergistic Verification of Hardware Peripherals through Virtual Prototype Aided Cross-Level Methodology Leveraging Coverage-Guided Fuzzing and Co-Simulation
dc.typepdf
dspace.entity.typeDistribution
relation.isDatasetOfDistribution65724bac-2a6d-4849-bc8b-7eb1f35c2346
relation.isDatasetOfDistribution.latestForDiscovery65724bac-2a6d-4849-bc8b-7eb1f35c2346

Files

Original bundle
Now showing 1 - 1 of 1
Loading...
Thumbnail Image
Name:
chips-02-03-00012.pdf
Size:
389.23 KB
Format:
Adobe Portable Document Format

Collections